Timing Performance Comparison of Two FPGA-based Charge Readout Electronics for TOF PET applications

摘要: Timing performance plays a vital role in radiation detector applications. Recently, two kinds of charge readout methods based on field programmable gate array (FPGA), namely FPGA-based charge-to-digital converter (FPGA-QDC) and FPGA-based charge-to-time converter (FPGA-QTC), were proposed. In comparison with traditional time over threshold (ToT), they can not only achieve high-precision timing pickoff but also accurately measure charge from radiation detectors. Both of them are the mixed signal circuits. In both circuits, analog part consists of an operational amplifer, few resistors and capacitors. In digital part, all function modules are implemented in the FPGA. Specifcally, an FPGA LVDS receiver works as a general voltage comparator. A time-to-digital converter (TDC) was developed to calculate the pulse width of the digital signal. To compare thet iming performance of both circuits, a coincidence timing resolution (CTR) evaluation setup comprising two TOF PET detectors was constructed. Each PET detector was made up of one 3×3×10 mm3 LYSO crystal bar coupled with a SiPM detector at one end. Results show the best CTR values between the two PET detectors were 335.03±2.00 ps and 357.86±3.31 ps full width at half maximum (FWHM) for the FPGA-QDC and FPGA-QTC respectively. Both are promising circuits for a power-effcient, multi-channel and low-cost front end readout electronics for nuclear radiation detectors.